Zachery JacobsonScholar Profiles

Zachery Jacobson

2004 - 2005 University Scholar
Mentor: Alan George
College of Engineering

"I applied to the University Scholars Program to prepare for research I will do in the future. I had already been working with my mentor, but I had never worked on an actual project in a team setting with deadlines. I believe this opportunity will help me learn more about engineering research and give me a chance to progress in the field of programmable gate arrays."

Zachery is a junior majoring in computer engineering with minors in physics and business administration. He is a National Merit Scholar and a member of the UF Honors Program. He has been on the President’s Honor Roll three times and the Dean’s List in his college every semester. Zachery is a member of Phi Sigma Kappa, Tau Beta Pi, the Student Honors Organization and is Student Government cabinet director of Parking and Transportation. He is also a residential college advisor for Hume Hall dormitory.

Research Description:

Analysis and Demonstration of Streams-C Application Mapping for FPGAs

I plan on working with an application mapper known as Streams-C for my University Scholars project. Application mappers are designed to allow Field Programmable Gate Arrays, or FPGAs, to be as accessible to programmers as easily as CPUs are today. Basically, FPGAs allow users to change the transistor logic gates on a chip to perform different operations on data, and then milliseconds later change to a new operation. Traditionally, FPGAs had to be hard-coded by programmers specializing in VHDL or specialized languages to perform the functions designers wanted. Application mappers hope to allow programmers to modify their existing code written in languages such as C to work with FPGAs. The application mappers then translate the slightly modified C code into a VHDL file, which can then be targeted for specific FPGA chips.

The application mapper Streams-C was written by the Los Alamos National Laboratory. It is currently targeting boards that the HCS lab does not own, so I will have to modify the code to fit our boards. This involves modifying the board description files and runtime libraries that the Streams-C package uses. Once I can get it working, I will be benchmarking RC configurations, trying to develop an infrastructure between RC and CPU time to be most efficient, and comparing performance of Streams-C with straight VHDL programming and other application mappers in both speed and area used on the FPGA. My dream would be to integrate application mapping technology into the group’s current technology, so that a computer could automatically know which tasks to send to an FPGA to be more efficient.

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Journal of Undergraduate Research

Volume 6, Issue 7
May/June 2005

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