Journal of
Undergraduate Research
Volume 1, Issue 8 - May 2000
Time Constant Magnification Using Filter and Hold Circuitry
Micah O'Halloran
ABSTRACT
Existing integrated circuit (IC) technology is not well suited for creating large on-chip capacitors. As a result, an analog IC filter with a modest time constant can require huge die area for the capacitor. This paper presents a new method for creating these large time constants without the need for such large capacitors. The technique calls for the replacement of all capacitors in a conventional analog filtering circuit with switched capacitors. A variable-duty clocking signal is used to periodically connect and disconnect the capacitor from the rest of the filter. Simulation results show that the apparent value of the capacitor increases linearly with the inverse of the duty cycle of the clocking signal. Thus, a capacitor can be made to look orders of magnitude larger than its physical value. We designed a low pass filter employing our new technique and had it fabricated in a MOSIS 2mm process. The test results on these ICs are encouraging. It is clear that the switching increases the overall time constant of our implemented filter. It does not, however, seem to do so linearly. This fact is probably due to the nonlinear aspects of the transistors and the finite rise and fall times of the clocking signal. Further research needs to be performed to better characterize this phenomenon in ICs.
INTRODUCTION
The research presented in this paper gives experimental results supporting an alternate method of creating a large time constant IC filter. The new technique, a mixed analog/digital approach invented at the University of Florida [1], calls for the replacement of each existing capacitor in a traditional analog filtering circuit by a capacitor with a switch connecting it to the rest of the circuit. This switch enables an outside signal, f(t), to control at which times the capacitor is connected to the remaining circuit, and thus how much average current flows into or out of the capacitor. The period (T) of f(t) defines the digital sampling period of the new mixed-mode circuit. The duty cycle of f(t) is defined below in Fig. 1.
Figure 1. Clocking Signal for the capacitor switch (the switch is closed when f(t) is high).
When applied to filters, the result of applying this technique is that the filter time constant is increased by the multiplying factor defined by:
Using this approach, a given filter's time constant can be multiplied by as much as two orders of magnitude without much additional circuitry, and thus additional die area. The succeeding sections explain this technique more fully and discuss the implementation of an IC low-pass filter using this technique.
THEORY
Traditional single-pole low-pass filter
We chose to test our technique on a single-pole low pass analog RC filter because of its simplicity. This standard circuit is shown below in Figure 2.
Figure 2. Standard RC low pass filter.
From simple circuit theory [2], we know that
This equation describes the transfer function of the RC circuit. An approximate Bode magnitude plot of the transfer function is shown below in Figure 3.
Figure 3. Approximate magnitude Bode plot of the transfer function T(s).
We can see from the Bode plot that the frequency response begins to roll off at the angular frequency wcutoff = 1/(RC). From circuit theory we know that the time constant of this circuit, t, is the reciprocal of wcutoff. Thus, for this circuit
This completes our analysis of a conventional RC low-pass filter. Next, we will examine how adding a switch to this circuit can alter the value of t, and thus shift the position of wcutoff .
Modified low-pass RC filter Mathematical Proof of Technique
The circuit implemented to test our switching technique is shown in Figure 4. It is a simple first-order low-pass filter with the switching component added to it.
Figure 4. Low pass filter with capacitor switch.
We will view the circuit in Figure 4 as digital rather than analog in the time domain throughout this proof. Equation (9) gives the difference equation defining the switched circuit.
Taking the z-transform of equation (9), substituting in kT for Dd where k = Dd/T, and rearranging, we get
The factor k is the portion of T that the signal f(t) is high, and thus is the duty cycle in decimal form. We can see that the pole is now at wcutoff = k/RC. And, since k £ 1, the cutoff frequency is either the same or has been shifted lower. The new time constant of the circuit is now
Thus, the switching has increased the effective time constant of the filter by a factor of 1/k.
SIMULATIONS
Simulation of the switching technique
The mathematical model of the system was put to the test using SPICE. As a reference, the following graph displays the 5V step response of a standard RC low pass filter with R = 2.6MW and C = 535pF (these component values will be seen again later):
Figure 5. SPICE simulation of a standard RC low pass filter's step response.
A marker has been placed on the graph at the point where the
output is at 63% of its final value of 5V. The amount of time it takes
to reach this voltage value is defined as the time constant of the RC
filter [2]. From the graph we can see that the time constant of this
RC filter is =1.38ms.
Next, we simulated the switched circuit that was shown in Figure 4 with R = 2.6MW and C = 535pF. The switch was clocked with a 30% duty cycle 100kHz square-wave signal. A graph of the resulting 5V step response of this circuit is shown below in Figure 6. From the graph, we can see that the time constant has now increased due to the switching. With a 30% duty cycle signal, the multiplying factor is
Figure 6. SPICE simulated output from switched low pass RC filter (30% duty cycle).
A marker has been placed on the graph in Figure 6 at the point where the voltage is at 63% of its final value, and we can see that the time constant for this filter is =4.62ms. The ratio of this time constant to that of the original filter is (4.62/1.38) = 3.34. The time constant has increased by the same factor as the multiplying factor.
IMPLEMENTATION
Overall Design
Earlier in this paper, it was required that the input signal change
negligibly over a period T of the clocking signal f(t). This is basically
a statement of the Nyquist criterion that must be upheld in any system
with digital sampling [3]. In order to enforce this criterion, we must
pass the input signal through an anti-aliasing filter before it can
be sampled, and we must provide a smoothing filter at the output of
the system [4]. This setup is shown below in Figure 8.
Figure 8a. General setup needed for digital sampling circuits.
Since our design was to be implemented in IC form, each of these stages had to be specially designed in order to be IC compatible.
A. Anti-aliasing and smoothing filters
Both of these filters are identical in design and were created using standard Gm-C filter techniques [5]. The designed cutoff frequency for these filters was 15kHz, and they were designed to have a -40dB/decade roll off above 15kHz.
Figure 8b. Transistor level description of Gm component.
The Gm design used in this project was identical to the one shown in Fig. 8 except the triode PMOS transistor was replaced with an N-Well resistor, and two additional scaled current mirrors were used at the output to reduce the current output of the Gm. These two changes were made in order to increase the linearity of the Gm component, and to decrease the transconductance of the Gm, respectively. Our final design values were a Gm ª 384nS (R ª 2.6MW), and C ª 6.5pF.
Since each Gm-C filter behaves like a standard RC filter, we must cascade two of these Gm-C filters in both the anti-aliasing and the smoothing filters in order to create a -40dB/decade roll off in each filter. Thus, both the anti-aliasing and smoothing filters looked like the filter shown in Figure 9.
Figure 9. 2nd order Gm-C low pass filter used for anti-aliasing and smoothing.
B. Digital sampling and manipulation
The digital sampling and manipulation block from Figure 8 was implemented to behave like the switched RC low pass filter from Figure 4. The only difference is that again, the R is replaced by an appropriate Gm component that simulates it. In this stage, R =2.6MW and C =535pF. Finally, the switch was implemented as a standard analog transmission gate [6].
TESTING
After having the chip fabricated by MOSIS, the final phase of this project was to test the IC. In the first test, the switching signal was not switched but held constant at 5V. Our chip in this case basically looks like the simple RC low pass filter shown in Figure 2. The step response was sampled from the oscilloscope and is shown below in Figure 10:
Figure 10. Step response with no clocking input.
All of the important attributes of the signal have been labeled.
We can see that the time constant of the filter is =895us. This value
is close to but not coincident with that obtained in the simulation
of the simple RC filter of 1.38ms. They don't match exactly, but remember
that the values in the simulation are only the design values and that
the fabricated values of our Gm and C can be off by as much
as 20% from their design values. This could account for the difference
in time constants. Thus, our basic circuit appears to work.
The second test was designed to verify that the time constant increases as the duty cycle of the switching signal shrinks. In this test, a 100kHz, 16% duty cycle signal was used as the switching signal. The results are shown below in Figure 11. Again all of the important attributes of the signal have been labeled. We can see that the time constant of the filter is = 2.46ms. The switching has increased the time constant over the non-switched value by a factor of
The expected increase in the time constant is a factor equal to the multiplying factor, given in Eq. 1. Using what we know about the clocking signal, we find that
Thus, the increase is not as much as was expected. However, this result is proof that the switching technique indeed increased the time constant of the RC low pass filter to many times of its original value.
Figure 11. Step response of 16% duty cycle switched filter.
| Duty Cycle | Time Constant |
|---|---|
| 100% | 895µs |
| 90% | 914µs |
| 80% | 936µs |
| 70% | 994µs |
| 60% | 1.152ms |
| 50% | 1.29ms |
| 40% | 1.46ms |
| 30% | 1.83ms |
| 16% | 2.46ms |
| 7.6% | 3.21ms |
| 5.1% | 3.45ms
We repeated the above procedure for several more duty cycles. The table below summarizes all of the measurements performed on the IC, and Figure 12 is a plot of the time constant versus multiplying factor (inverse of the duty cycle).
It is clear from the graph that the increase in time constant is not linear with the increase in the multiplying factor. One source of this nonlinear behavior can be probably be attributed to the nonlinear characteristics of the transistors used in the switch and Gms. A second source of error is probably clock feed through. A third source is the waveform generator used to create the clocking signal. The pulses created by the generator have rise and fall times of 56ns and 80ns, respectively. These times were found to be independent of the actual pulse width. Thus, as the duty cycle decreases (multiplying factor goes up) the rise and fall times become a significant amount of extra time that the switch is connected. The longer the switch is connected, the smaller the time constant, so this may be what we see in the above graph. CONCLUSIONSThis paper has presented theoretical, simulation, and experimental evidence supporting a new technique for creating large time constant IC filters. The theoretical and simulation results predict that as the duty cycle of the switching signal decreases, the time constant of the switched filter will increase linearly. Experimental results prove that the time constant does increase as the duty cycle decreases, however, the increase is not linear. Three possible sources of error are transistor nonlinearities, clock feed through, and the finite rise and fall times of the clocking signal. In the future, research should focus on determining which of these factors is destroying the linear relation and how this technique can be applied to other types of filters. REFERENCES
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